Integrated circuit devices are often damaged by relatively large voltage transients due to electrostatic discharge (ESD) and electrical overstress (EOS). The small geometries used in modern integrated circuit devices cannot withstand high energies before PN junctions are destroyed. Particularly prone are reverse biased junctions subject to surface breakdown, such as breakdown at the emitter-base junction of vertical NPN transistors.
Protection structures have been incorporated into integrated circuit chips, mainly by using diode clamps to either B+ or ground. Back-to-back zener diodes have been utilized for circuit protection by exhibiting a controlled breakdown when the voltage potential across the diodes exceeds a certain value. The present invention comprises a novel structure able to be easily incorporated into a monolithic integrated circuit structure for providing protection against large voltage transients.